CoCo 3 Advanced ML 

                  Interrupts and exception processing        
-------------------------------------------------------------------------------
Interrupt-   definition: An external event which alters the normal flow  of  the
microprocessor.

On the 6809 there are 4 hardware interrupts and 3 software interrupts. They  are
connected to the pins

IRQ   FIRQ    NMI     RESET    
Interrupt           expanded notation
IRQ                  Interrupt Request
FIRQ                 Fast Interrupt Request
NMI                  Non-maskable (non-stoppable) interrupt
RESET                Inital power up and RESET button

When a logic 0 is present on one of these pins, the  microprocessor  first  sees
if the bit in CC is 0. If it is, the "exception processing"  is  performed.  The
microprocessor gets the address to go to in it's vectors.  These  point  to  the
start of the program that will handle the interrupt.

Interrupt           Vector location
 SWI3                 FFF2 
 SWI2                 FFF4
 FIRQ                 FFF6
 IRQ                  FFF8
 SWI                  FFFA
 NMI                  FFFC
 RESET                FFFE 

For example, if  an  IRQ  occured,  and  locaion  $FFF8-$FFF9  was   $A1CB,  the
microprocessor woul then start executiong code at $A1CB.
Interrupts usually save registers before the interrupt handler is called.

Interrupt           registers pushed
  SWI3               A,B,X,Y,U,PC,DP,CC
  SWI2               A,B,X,Y,U,PC,DP,CC
  FIRQ               PC,CC
  IRQ                A,B,X,Y,U,PC,DP,CC
  SWI                A,B,X,Y,U,PC,DP,CC
  NMI                A,B,X,Y,U,PC,DP,CC
  RESET              none

The FIRQ interrupt is fast in the sense that it does not push many registers  on
the stack.

THE RTI instruction

RTI is similar to RTS except that it, in conjunction with the E  bit  in  CC,
determines how many registers to pull from the stack.

In the CoCo 3, each of the vectors is on ROM. Therefore, the vectors  themselves
cannot be changed. However, the vectors each point to a RAM  location  that  can

be changed.
Vector            points to:              code at location
FFF2                  ???                         ??       
FFF4                  ???                         ??        
FFF6                 FEF4                    LBRA     $010F
FFF8                 FEF7                    LBRA     $010C
FFFA                 FEFA                    LBRA     $0106
FFFE                 8C1B                     reset code

Using this, a program that constanly changes a memory location can be written easily.

         ORG     $0E00
         INC     $0400    change location $400 on screen
         JMP     $010C    return to normal IRQ processing
         ORG     $FEF7
         JMP     $0E00    change IRQ to go to the new program

Now would be a good time to discuss what each of the interrupts is for and their
uses

 IRQ             sound generation and the TIMER function
 FIRQ            disk drive access
 NMI             not supported
 SWI             not used in Basic however it's used by EDTASM
 SWI2            not used
 SWI3            not used

Thereis a priority to the interrupts, from lowest to highest:
  SWI SWI2 SWI3 IRQ FIRQ NMI RESET

if there are multiple interrupts, only the highest priority one will be taken.
 To shut off the interrupts, use
 ORCC  #$10   shuts off IRQ
 ORCC  #$40   shuts off FIRQ
 ORCC  #$50   shuts them both off

The GIME chip has the capability of sending interrupts  to  either  the  IRQ  or
FIRQ line. If you are running a 100% ML program once they are  set,  fine.  But,
if you are  running  a  combination  program,  Basic  sets  the  GIME  interrupt
registers back to Vertical Border only.